Harmonic Performance Evaluation of SPWM-Controlled Seven-Level Single-Phase Diode-Clamped Multilevel Inverters across Variable Modulation Indices
DOI:
https://doi.org/10.64321/jcr.v2i5.12Keywords:
Alternate phase opposition disposition (APOD), Phase disposition (PD), Phase opposition disposition (POD), Pulse width modulation (PWM), Total harmonic distortion (THD) Multilevel Inverter, Diode-Clamped Inverter, Modulation Index Power Quality, Harmonic AnalysisAbstract
Multilevel inverters (MLIs) are crucial in medium-voltage high-power applications due to their high-power quality and reduced electromagnetic interference. Among different topologies, the diode-clamped MLI (DCMLI) offers a robust structure. This paper presents a harmonic performance evaluation of SPWM-controlled seven-level single-phase DCMLI across variable modulation indices. The performance evaluation techniques include Phase Disposition (PD), Alternative Phase Opposition Disposition (APOD), and Phase Opposition Disposition (POD). A rigorous simulation model is developed in MATLAB/Simulink to evaluate the output voltage THD across a wide range of modulation indices (Ma) of 0.4 to 1.2 in steps of 0.1 and an M_a = 1.0 using PD strategy (THD=8.5%). The results demonstrate that the PD strategy consistently yields the lowest THD of (8.5%) across the linear modulation range (Ma < 1.0), while the performance in the over modulation region varies distinctly between strategies. This study provides a clear guideline for selecting the optimal SPWM strategy for a seven-level diode-clamped multi-level inverter based on the desired operating modulation index to minimize harmonic content and enhance power quality.
References
Gonshwe Y. N, Kureve D. T and Awuhe S.T (2016). Optimum Design of Phase Opposition Pulse Width Modulation Logic Circuit for Switching Seven-level Cascaded Half Bridge Inverter. American Journal of Engineering Research Vol.5, Issue 2, pp35-41
Kashappa, N. (2024). Inverters and Multilevel inverters for Power Electronics Systems. ShodhKosh: Journal of Visual and Performing Arts, 5(6), 641–648. doi: 10.29121/shodhkosh.v5.i6.2024.4232
Mahato, B., Ranjan, M., Pal, P. K., Gupta, S. K. & Mahto, K. (2022) Design, Development and Verification of a New Multilevel Inverter for Reduced Power Switches. Archives Electr. Eng. 71, 1051–1063 (2022).
Nabae, A., Takahashi, I. T., and Akagi, H. (1981). A New Neutral-Point-Clamped PWM Inverter. IEEE Trans. Ind. Appl., vol. IA-17, no. 5, pp. 518–523, Sept. 1981.
Ansari, S. & Gupta, O. H. (2021). Differential Positive Sequence Power Angle-based Microgrid feeder protection. Int. J. Emerg. Electr. Power Syst. 22, 525–531 (2021)
McGrath, B. P. and Holmes, D. G. (2002). Multicarrier PWM strategies for Multilevel Inverters," IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 858–867, Aug. 2002.
Rusdi, M., Ponadi, A., Hardiantono, D., & Sumbung, F. (2021). THD Analysis on a Single Phase 7-Level Diode Clamped MLI with LC Filter Based on Multicarrier Anti-Phase SPWM Technique. IOP Conference Series: Materials Science and Engineering, 1125. https://doi.org/10.1088/1757-899X/1125/1/012069.
Reddy, K. (2020). Comparative Analysis of Mc-Spwm and Msvpwm for Seven Level Diode Clamped Multilevel Inverter., 15. https://doi.org/10.26782/jmcms.2020.01.00015.
Lokeshwar, C., Sushama, M., & Satish, P. (2017). Design and Performance Comparison of 7 level Diode Clamped Multilevel Inverter for Modified SVPWM Techniques. https://doi.org/10.15224/978-1-63248-117-7-48.
Yuditya, B., Hasanah, R., Ardhenta, L., & Taufik, T. (2020). Performance Comparison of Single-Phase Multilevel Inverter with SPWM Unipolar and Bipolar Switching Techniques. 2020 FORTEI-International Conference on Electrical Engineering (FORTEI-ICEE), 102-107. https://doi.org/10.1109/FORTEI-ICEE50915.2020.9249911.
Shaji, L., Bansal, P., & Bhuria, V. (2020). Performance Analysis of a New Single Phase Single Source 7-Level Inverter Topology Using Different SPWM Techniques. 2020 IEEE First International Conference o n Smart Technologies for Power, Energy and Control (STPEC), 1-6. https://doi.org/10.1109/STPEC49749.2020.9297703.
Amah, G., G. and Mom, J., M. (2019) Analysis of Sinusoidal Pulse Width Modulation Technique using Single-Phase Nine-Level Diode-Clamped Multilevel Inverter. American Journal of Engineering Research, e-ISSN 2320-0847, p-ISSN 2320-0936, Volume 8, Issue 5, pp. 201-209, 2019. https://www.ajer.org/papers/Vol-8-issue-5/X0805189195.pdf
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